Many electronic systems include a memory device, such as a Dynamic Random Access Memory (DRAM), to store data. A typical DRAM includes an array of memory cells. Each memory cell includes a capacitor that stores the data in the cell and a transistor that control access to the data. The capacitor typically includes two conductive plates separated by a dielectric layer. The charge stored across the capacitor is representative of a data bit and can be either a high voltage or a low voltage. Data can be stored in either the memory cells during a write mode, or data may be retrieved from the memory cells during a read mode. The data is transmitted on signal lines, referred to as digit lines, which are coupled to input/output (I/O) lines through transistors used as switching devices. Typically, for each bit of data stored, its true logic state is available on an I/O line and its complementary logic state is available on an I/O complement line. Thus, each such memory cell has two digit lines, a digit and digit complement.
Typically, the memory cells are arranged in an array and each cell has an address identifying its location in the array. The array includes a configuration of intersecting conductive lines and memory cells are associated with the intersections of the lines. In order to read from or write to a cell, the particular cell in question must be selected, or addressed. The address for the selected cell is represented by input signals to a word line decoder and to a digit line decoder. The word line decoder activates a word line in response to the word line address. The selected word line activates the access transistors for each of the memory cells in communication with the selected word line. The digit line decoder selects a digit line pair in response to the digit line address. For a read operation the selected word line activates the access transistors for a given word line address, and data is latched to the digit line pairs. In order for there to be memory cells there must be a semiconductor fabrication process which produces a variety of thin films.
A large variety of thin films are used in the fabrication of semiconductor devices. Chemical vapor deposition (CVD) is a widely used method for depositing such thin films for a large variety of materials. In a typical CVD process, reactant gases (often diluted in a carrier gas) enter a reaction chamber containing a deposition surface. The gas mixture may be heated by absorbing radiation as it approaches the deposition surface. Near the surface, thermal, momentum and chemical concentration boundary layers form as the gas stream heats, slows down due to viscous drag, and changes in chemical composition. Heterogenous reactions of the source gases or reactive intermediate species (formed from homogenous pyrolysis) occur at the deposition surface, thus forming the deposited material. Gaseous reaction by-products are then transported or vented out of the reaction chamber.
Another popular technique for depositing thin films is physical vapor deposition (PVD). PVD processes deposit thin films on a substrate by such techniques as sputtering, vacuum deposition, or laser ablation from a solid source or target having the desired composition of the deposited film.
Because of a fundamental difference between CVD and PVD processes, i.e., gaseous reactants versus solid sources, the resulting films tend to have different chemical characteristics even when the desired resultant film is the same, e.g., a titanium or titanium nitride film produced by CVD or PVD. These differing chemical characteristics often lead to differences in how the resultant films react to downstream processing, such as etching, or cleaning, of the substrate surface.
Cleaning of the substrate surface is often desirable after some bulk removal of material from the substrate surface. As an example, material containing one or more layers may be formed on a substrate surface to fill a hole or recess. A chemical-mechanical planarization (CMP) technique may be used to abrade the material from the surface, substantially leaving only that portion of the material contained in the hole or recess. CMP techniques must be tightly controlled to remove all of the surface material without detrimentally abrading away the substrate surface. This often results in patches or islands of the material remaining on the substrate surface. Such patches or islands are typically cleaned from the substrate surface by some chemical etchant. In the case of forming contacts, vias or interconnects in a hole or recess, removal of such islands is desirable to reduce the risk of electrical shorts.
Hydrofluoric acid (HF)-based solutions are popular chemical etchants in semiconductor processing. While such HF-based solutions are generally effective at uniform removal of titanium-containing films deposited by PVD processes, they generally result in pitting of titanium-containing films deposited by CVD processes. There is a need in the art for alternative methods for removing the CVD titanium and/or CVD titanium nitride.